The present invention relates to a drive circuit for generating an output signal having an amplitude greater than the breakdown voltage of its element, and more particularly, to a drive circuit for outputting a control signal for controlling voltage boosting operation in a voltage conversion device that boosts an input voltage to output a boosted output voltage.
In recent years, in communication systems such as cellular phones, efforts toward thinner cabinets are actively going on. In this relation, in place of dynamic speakers conventionally used widely as speakers for sound reproduction, thin piezoelectric speakers have been increasingly adopted. To drive a piezoelectric speaker, a differential voltage amplitude of about 13 Vpp is generally necessary. Hence, a voltage of about 7V to 10V is supplied to an amplifier for driving the piezoelectric speaker as the power supply voltage. Portable equipment such as cellular phones generally uses a lithium-ion battery that outputs a voltage of about 4V. To use the output voltage of the lithium-ion battery as the power supply voltage for the amplifier for driving the piezoelectric speaker, therefore, the output voltage of the lithium-ion battery must be boosted about twofold. For this purpose, a charge-pump power supply device is provided which can be implemented with a comparatively simple configuration. Such a charge-pump power supply device is used, not only for cellular phones, but also in various technical fields.
FIG. 11 shows a configuration of a conventional charge-pump power supply device. This conventional charge-pump power supply device switches the connection states of a booster capacitance C91, an input node Nin for receiving an input voltage VC (power supply voltage, for example), a reference node Nref for receiving a reference voltage VL (ground voltage, for example) and an output node Nout for outputting an output voltage VH, by means of drive transistors T91 to T94, to thereby boost the input voltage VC and output the boosted output voltage VH. Referring to FIG. 11, first, at start of a charging mode, the transistors T91 and T92 are turned ON while the transistors T93 and T94 are turned OFF. This results in formation of a charging path as shown in FIG. 11, permitting charge corresponding to the voltage difference between the input voltage VC and the reference voltage VL to be stored in the booster capacitance C91. Thereafter, at start of a boosting mode, the drive transistors T93 and T94 are turned ON while the drive lo transistors T91 and T92 are turned OFF. This results in formation of a boosting path as shown in FIG. 11, permitting output of the output voltage VH (VH=2×(VC−VL)). In this way, the output voltage VH having a voltage value twice as large as the input voltage VC is outputted.
In FIG. 11, to turn ON the drive transistor T91, the reference voltage VL must be applied to the gate of the drive transistor T91. Contrarily, to turn OFF the drive transistor T91, the output voltage VH must be applied to the gate of the drive transistor T91. In other words, a control signal swinging between the output voltage VH and the reference voltage VL must be supplied to the gate of the drive transistor T91. Hence, a drive circuit for supplying such a control signal to the drive transistor T91, which operates using the output voltage VH and the reference voltage VL as its power supply voltages, must be configured to have a breakdown voltage higher than other drive circuits for supplying control signals to the other drive transistors T92, T93 and T94. To increase the breakdown voltage, however, a process step for increasing the breakdown voltage must be added to the fabrication process. Also, the circuit area will increase by increasing the breakdown voltage.
To solve the above problem, Japanese Laid-Open Patent Publication No. 2001-127615 (Patent Document 1) discloses a buffer circuit operating with a power supply voltage higher than the breakdown voltage of its element. FIG. 12A shows a configuration of the buffer circuit disclosed in Patent Document 1. A transistor M92, receiving a bias voltage VBP at its gate, controls an intermediate voltage V91 (drain voltage of a transistor M91) so as not to be lower than “VBP+|Vthp|”. Likewise, a transistor M93, receiving a bias voltage VBN at its gate, controls an intermediate voltage V94 (drain voltage of a transistor M94) so as not to be higher than “VBN−Vthn”. Note that “|Vthp|” and “Vthn” are respectively threshold voltages of the transistors M92 and M93. When this buffer circuit is used as a drive circuit for a charge-pump power supply device, the output voltage VH and the reference voltage VL of the charge-pump power supply device are supplied to the buffer circuit as power supply voltages as shown in FIG. 12A.
The operation of the buffer circuit shown in FIG. 12A will be described with reference to FIG. 12B. When input signals SP and SN become low (VBP and VL, respectively), the transistor M91 is turned ON while the transistor M94 is turned OFF. Hence, the output voltage Vout becomes high (VH). Also, the intermediate voltages V91 and V94 respectively become “VH” and “VBN−Vthn”. Contrarily, when the input signals SP and SN become high (VH and VBN, respectively), the transistor M91 is turned OFF while the transistor M94 is turned ON. Hence, the output voltage Vout becomes low (VL). Also, the intermediate voltages V91 and V94 respectively become “VBP+|Vthp|” and “VL”.
The maximum values of the source-drain voltages Vsd91 to Vsd94 of the transistors M91 to M94 are respectively expressed as follows.Vsd91=VH−(VBP+|Vthp|)  (1)Vsd92=(VBP+|Vthp|)−VL  (2)Vsd93=VH−(VBN−Vthn)  (3)Vsd94=(VBN−Vthn)−VL  (4)As long as these source-drain voltages Vsd91 to Vsd94 do not exceed the corresponding source-drain breakdown voltages of the transistors M91 to M94, the buffer circuit shown in FIG. 12A can output the output voltage Vout having a value higher than the source-drain breakdown voltages of the transistors M91 to M94.
However, in the buffer transistor shown in FIG. 12A, the bias voltages VBP and VBN and the amplitude of the output voltage Vout of the buffer circuit must be set considering, not only the source-drain breakdown voltages of the transistors M91 to M94, but also the threshold voltages “|Vthp|” and “Vthn” of the transistors M92 and M93. In particular, when such a buffer circuit is used as a drive circuit for a charge-pump power supply device, the amplitude of a control signal for a drive transistor will be restricted. As a result, the voltage value of the output voltage of the charge-pump power supply device will be restricted.
For example, assume that the source-drain breakdown voltages of the transistors M91 to M94 are all “Vabs” and that “|Vthp|=Vthn=Vth”. Assume also that “VBP=VBN=VB=(VH−VL)/2” because it is inefficient to set the bias voltages VBP and VBN separately. In this case, the above expressions (1) to (4) will be changed to the following.Expression (1)→Vsd91=VH−(VB+Vth)  (1′)Expression (2)→Vsd92=(VB+Vth)−VL  (2′)Expression (3)→Vsd93=VH−(VB−Vth)  (3′)Expression (4)→Vsd94=(VB−Vth)−VL  (4′)
When “VL=0” is set for simplification, “VH=2×VB” will be satisfied. The above expressions (1′) to (4′) will then be changed to the following.Expression (1′)→Vsd91=VB−Vth  (1″)Expression (2′)→Vsd92=VB+Vth  (2″)Expression (3′)→Vsd93=VB+Vth  (3″)Expression (4′)→Vsd94=VB−Vth  (4″)
From the above expressions (1″) to (4″), it is found that the maximum value of the source-drain voltages is “VB+Vth”. In the buffer circuit shown in FIG. 12A, the amplitude of the output voltage Vout will be largest when the maximum source-drain voltage value “VB+Vth” is equal to the source-drain breakdown voltage “Vabs”. That is, the amplitude of the output voltage Vout will be largest when the following expression (5) is satisfied.VB+Vth=Vabs→VB=Vabs−Vth  (5)
Since “VH=2×VB”, “VH=2×(Vabs−Vth)” will be satisfied. This indicates that the voltage VH supplied to the buffer circuit as a power supply voltage must be set considering, not only the source-drain breakdown voltages of the transistors M91 to M94, but also the threshold voltages of the transistors M92 and M93.
Also, assuming that the source-drain breakdown voltages of the drive transistors T91 to T94 shown in FIG. 11 are “Vabs”, the maximum output voltage of the charge-pump power supply device will be “2×Vabs”. However, when the control signal for the drive transistor T91 is generated by the buffer circuit shown in FIG. 12A, the output voltage of the charge-pump power supply device must be lower than “2 (Vabs−Vth)”. For example, assume that “Vabs=5.0 [v]” and “Vth=0.7 [v]”. In this case, the maximum value of the output voltage the charge-pump power supply device can output is “10.0 [v]”. To use the buffer circuit shown in FIG. 12A as the drive circuit, however, the maximum value of the output voltage of the charge-pump power supply device must be made lower than “8.6 [v]”. Thus, the voltage value of the output voltage of the charge-pump power supply device is restricted.